As is known in the art, FIFOs are used extensively in digital systems such as computers, signal processors, etc. to pass data and/or control, i.e., information, from one part of the system to another. In these systems, it is important to confirm that the information introduced (“pushed” or written) into the FIFO is the same as the data received (“popped” or read) from the FIFO.
More particularly, a FIFO includes a plurality of storage stages. These storage stages may be a series of shift register stages or addressable stages. In either case, the information first written into the FIFO is the first information read from the FIFO. With a series of shift register stages, the information data is pushed into the input register stage in response to shift signals and any information previously residing in the FIFO is shifted into the next highest register stage, such shift signals being produced synchronous with a clock signal pushed into the FIFO. A “pop”, or read address is applied to the FIFO that points to the oldest data in the FIFO. It is also important to confirm that the correct amount of information is popped from the FIFO.